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| 1. | microprocessor from having to perform the complex and continual runtime analysis that superscalar RISC and CISC |
| 编译器预先安排好这种捆绑，因而VLIW能快速地平行处理指令，免去了微处理器不得不执行复杂和连续的运行时间分析，而超级标量RISC和CISC芯片必须做这种分析。 |
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| 2. | CISC instruction is complex in function and variable in length. |
| CISC结构的微处理器指令功能复杂,指令长度不固定。 |
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| 3. | microprocessor design, eclipsing older approaches such as RISC and complex instruction set computing (CISC |
| VLIW已经成为一种具有优势的微处理器设计方法，开始侵蚀RISC（精简指令集计算）和CISC（复杂指令集计算）较陈旧的设计方法。 |
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| 4. | paper introduces how RISC develops from its cradle to its maturity and how Intel tried RISC, combined CISC |
| 本文介绍了RISC技术发展中,Intel公司从对RISC技术的尝试到实现CISC与RISC的融合,并开发出基于CISC/RISC技术MPU的过程。 |
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| 5. | CISC was the dominant approach because it conserved memory. |
| CISC是当时占主导的设计方法，因为它节省存储器。 |
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| 6. | can cost less, burn less power and achieve significantly higher performance than comparable RISC and CISC |
| 与RISC和CISC芯片相比，VLIW芯片的成本低、功耗低、并能获得更高的性能。 |
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| 7. | In a CISC architecture, there can be hundreds of program instructions -- simple commands that tell the |
| 在CISC体系结构中，有数百条程序指令，即告诉系统进行数字相加、数值储存和结果显示等的简单命令。 |
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| 8. | poor VLIW compiler will have a much greater negative impact on performance than would a poor RISC or CISC |
| 一个差的VLIW编译器对（系统）性能的负面影响超过差的RISC或CISC编译器的影响。 |
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| 9. | Variable-length instructions are more difficult for a chip to process, though, and the longer CISC instructions |
| 可变长度指令让芯片处理更为困难，较长的指令也非常复杂。 |
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